1. Technical Field
The present invention relates to data communication networking devices, more particularly, to data network switches capable of communicating data frames to both local area networks and virtual local area networks.
2. Background Art
A multiport data network switch conventionally permits data communication among a plurality of media stations in a local area network. Each station in the network is associated with a port of the switch. Data frames, or packets, are transferred between stations by means of data network switch media access control (MAC) circuitry, or xe2x80x9cengines,xe2x80x9d for each switch port. The network switch passes data frames received from a transmitting station to a destination station based on the header information in the received data frame.
The switch can link the network to other networks through one or more predesignated switch ports. The capability thus exists for creating logical workgroups of users who may be physically separated from each other. Members of a workgroup may be coupled directly with the switch in the local area network, while other members of the workgroup may be coupled to one or more remote networks that are linked to the switch at a designated port. These groupings can be thought of as virtual local area networks (VLANs) or xe2x80x9csub-networksxe2x80x9d within a larger network. VLAN groupings can provide privacy and security to their members while enabling xe2x80x9cbroadcast domainsxe2x80x9d whereby broadcast traffic is kept xe2x80x9cinsidexe2x80x9d the VLAN.
Data packets communicating within the VLAN require information that identifies the VLAN grouping, or VLAN type, and VLAN ID assigned to the station. Such information, or xe2x80x9ctag,xe2x80x9d is provided as additional fields in the frame header. The frame format for such packets thus is expanded relative to the standard frame format. For example, the Ethernet ANSI/IEEE 802.3 standard untagged frame format and 802.1 d standard tagged frame format are illustrated, respectively, in FIGS. 4a and 4b. 
The untagged frame format, shown in FIG. 4a, includes a header portion that allocates six bytes for destination address, six bytes for source address, and two bytes for type/length. The data portion is not fixed in length, but has a permissible range between forty-six and fifteen hundred bytes. A four byte frame check sequence (FCS) follows the data portion. Under Ethernet protocol, the maximum packet length for untagged packets is 1518 bytes. The tagged frame format, shown in FIG. 4b, provides for a 2 byte VLAN Tag Protocol Identifier (TPID) field and a 2 byte Tag Control Information (TCI) field positioned between the source address field and the length field. The frame format for VLAN tagged frames thus is extended in length with respect to the untagged frames. The maximum packet length for such tagged packets is 1522 bytes.
These multiple header format standards impose challenges in the management of data communication by the switch. In addition to its various switching functions that are based on header information, the switch must monitor whether packets are within maximum permissible lengths. Determination of whether a given packet, which is of a length between 1518 bytes and 1522 bytes, is within the permissible maximum byte length requires recognition of whether or not the frame is a tagged frame. Inasmuch as this information is located in header fields that only exist in tagged frames, a technique must be found to distinguish the third header field of each frame as either a type/length field or a VLAN TPID field. As a further complication, tagged frames are only permissible for designated VLAN ports, i.e., xe2x80x9ctagged ports.xe2x80x9d A frame of 1522 bytes length may be oversized even though tagged, if it has been received at a port not designated for VLAN communication. Thus, permissible length determination also must account for port authorization. Conversely, a frame communicated via a tagged port may or may not be a tagged frame. A frame of 1522 bytes length that has been received at a tagged port thus would be oversized if it is not a tagged frame. Recognition of a frame as a tagged frame by the switch is also required for directing the frame to an appropriate output port. The switch, however, has no indication that an incoming frame is tagged prior to receiving the VLAN type field with the frame.
Other switch functionalities, and conformance with external network interaction, will often require conversion of a tagged frame to untagged format. For example, a tagged packet, received at a VLAN tagged port, may require transmission to a network station coupled to an untagged port. Also, if the VLAN header information is no longer otherwise necessary, continued storage of such data becomes inefficient from the standpoint of memory capacity and transmission bandwidth. The switch must be capable of stripping the tag information from the frame header at appropriate stages of operation. Hence, the switch must also be capable of reconverting a stripped frame to tagged format if the packet is to be transmitted to a VLAN destination via a tagged port. In addition, the switch should be able to pass untagged frames without modification when required. The processing load that is required to support the manipulation of these frames can be quite intensive at times. Therefore, concentrating this load in a single, centralized frame forwarding logic circuit, as in conventional implementations, could result in system performance degradations. In particular, the centralized frame forwarding logic could become the bottleneck of the system. Further, the system is less reliable when compared to a distributed logic implementation.
There exists a need for a switching device that generates frame forwarding information for various types of data transmissions in a VLAN environment, including transmissions that do not utilize VLAN tags. There is also a need for distributing the process of manipulating VLAN tags to avoid processing bottlenecks in the system and to increase system reliability.
These and other needs are attained by the present invention, where an internal rules checker and a port vector FIFO logic (PVF) cooperatively process data frames to add, strip, or modify VLAN tags. The internal rules checker sends a forwarding descriptor, which contains information about the frame type and operation code information, to the port vector FIFO logic. In turn, the port vector FIFO logic selectively manipulates the VLAN tags and accordingly instructs the dequeuing logic in the output ports on a port-by-port basis on how to transfer the data frames. Under this arrangement, the forwarding logic is shared between the internal rules checker and the PVF. Distribution of forwarding logic enhances speed of processing.
According to one aspect of the present invention, a multiport switch is configured for transferring a data frame to a network node. The multiport switch comprises a rules checker logic for determining a type of data frame based upon header information associated with the data frame. The rules checker logic also outputs a corresponding forwarding descriptor that comprises a virtual local area network (VLAN) identifier and an operation code. The operation code indicates the method of modifying the data frame. Port logic generates a modified operation code and selectively manipulates the VLAN identifier based upon the forwarding descriptor. The data frame is transmitted via one or more output ports based upon the modified operation code.
Still another aspect of the present invention provides a method for processing a data frame. The method comprises determining a type of data frame based upon header information associated with the data frame. The method further includes outputting a corresponding forwarding descriptor that comprises a virtual local area network (VLAN) identifier and an operation code. The operation code indicates the method of modifying the data frame. A modified operation code is generated based upon the forwarding descriptor. In addition, the VLAN identifier is selectively manipulated based upon the forwarding descriptor. The method also involves transmitting the data frame via one or more output ports based upon the modified operation code.
Additional advantages and novel features of the invention will be set forth in part in the description which follows, and in part may become apparent to those skilled in the art upon examination of the following or may be learned by practice of the invention. The advantages of the invention may be realized and attained by means of the instrumentalities and combinations particularly pointed out in the appended claims.